|
On Fri, 24 Mar 2006, Russell King - ARM Linux wrote:
However, theres a recent twist to this - the struct page in the scatter
list may not refer to the page being transferred - annoyingly, offset+
length may be greater than PAGE_SIZE.
This makes the cache flushing issues a lot harder to properly solve,
and as a result its highly likely that all the current fixes in the
drivers are actually broken.
What about simply calling blk_queue_max_segment_size(..., PAGE_SIZE) for
the drivers that also need the flush_dcache_page()? For example that
could be a per host flag in the MMC subsystem whether or not the driver
can (or intend to) do DMA, and the queue limit adjusted accordingly.
Roll on the days when ARM becomes fully cache coherent is all I can
say - Im getting extremely peeved at the performance hits that all
this explicit manual cache handling is incurring.
Agreed.
Nicolas
-------------------------------------------------------------------
List admin: rel="nofollow" lists.arm.linux.org.uk/mailman/listinfo/linux-arm lists.arm.linux.org.uk/mailman/listinfo/linux-arm
FAQ: rel="nofollow" www.arm.linux.org.uk/mailinglists/faq.php www.arm.linux.org.uk/mailinglists/faq.php
Etiquette: rel="nofollow" www.arm.linux.org.uk/mailinglists/etiquette.php www.arm.linux.org.uk/mailinglists/etiquette.php
|
